Synopsys Off Campus Drive 2026: Apply for Synopsys Off Campus Drive 2026 for the Digital Design Engineer Apprenticeship in Noida. Fresh B.E./B.Tech ECE, EEE & related graduates from 2025/2026 can apply. Check eligibility, skills, stipend details & application link.
About Company: Synopsys technology is at the heart of innovations that are changing the way we live and work. The Internet of Things. Autonomous cars. Wearables. Smart medical devices. Secure financial services. Machine learning and computer vision. These breakthroughs are ushering in the era of Smart, Secure Everything―where devices are getting smarter, everything’s connected, and everything must be secure. Powering this new era of technology are advanced silicon chips, which are made even smarter by the remarkable software that drives them. Synopsys is at the forefront of Smart, Secure Everything with the world’s most advanced tools for silicon chip design, verification, IP integration, and application security testing.
Job Title: Digital Design Engineer Apprenticeship
Location: Noida
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Job Description:
- Assist in developing and maintaining UVM-based testbenches for functional verification of digital blocks of Serdes PHYs
- Create and execute test cases, sequences, checkers, and assertions to verify RTL functionality and ensure protocol compliance in Serial Links.
- Analyze simulation results, debug test failures, and work closely with design engineers to identify and resolve functional issues.
- Contribute to coverage-driven verification by developing functional coverage models and tracking verification metrics to improve design quality.
Requirements:
- Completed Bachelor’s degree in Electronics and Communication Engineering, Electrical or a related field (Mandatory).
- Fresh graduates from the class of 2026 or 2025.
- Not currently enrolled / completed any M-Tech programs or postgraduate diplomas.
- Not employed in any full-time positions at any company (limited internship experience is acceptable).
- Strong digital electronics fundamentals.
- Proficiency in Verilog and SystemVerilog, you have written RTL/Testbenches.
- Exposure to functional verification methodologies like UVM, OVM, or VMM is a plus.
- Theoretical knowledge of protocols such as PCIe is a plus.
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Qualification: B.E / B.Tech (2025/2026 batch)
Work Experience: Freshers
How to Apply for Synopsys Off Campus Drive 2026?
Interested and Eligible candidates can apply for this drive online by using the link below.
Apply: Click Here