Cadence Recruitment 2024: Cadence Recruitment 2024 For Design Engineer. B.E / B.Tech / M.E / M.Tech candidates can apply. The detailed eligibility and application process are given below.
About Company: Cadence enables electronic systems and semiconductor companies to create the innovative end products that are transforming the way people live, work and play. Cadence® software, hardware and IP are used by customers to deliver products to market faster. The company’s System Design Enablement strategy helps customers develop differentiated products—from chips to boards to systems—in mobile, consumer, cloud datacenter, automotive, aerospace, IoT, industrial and other market segments. Cadence is listed as one of Fortune Magazine’s 100 Best Companies to Work For.
Job Title: Design Engineer
Location: Bangalore
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Job Description:
- Pre-silicon emulation and Verification of System in NCSIM and Palladium.
- Hardware and Subsystem Design for all the Projects. (HW/SW infrastructure designed within the team.)
- Prototyping and Firmware Development for our High-Speed Serdes like PCIe, CXL, UCIe, USB, and ethernet.
- Lead the Bringup, Debug, Compliance efforts, and System level Characterization all the way to report release.
- Engage in interop and Customer Debug.
- Chance to work on cutting-edge SERDES IPs from Cadence. Refer to Cadence’s Website for more details on our SERDES IPs.
- Tremendous learning curve on SERDES PHY, Controllers, Protocol, and System integration.
- Hardware and Subsystem design expertise.
- The Kick in deploying and debugging your Solutions in different System environments.
Requirements:
- 1-3 years (with Btech) or 0-2 years (with Mtech) experience in Post-Silicon PHY and Systems Validation.
- Physical Layer and Protocol layer experience on At least one High-speed SERDES.
- Debug skills.
- Experience in using lab equipment such as Oscilloscopes, Bit Error Rate Testers, Protocol Exercisers, and Analyzers.
- Experience leading System validation efforts for SERDES solutions.
- Experience in PCIe LTSSM states is a plus.
- Experience in FPGA Design and Schematic design.
- Experience in IP/SoC Physical Layer Electrical Validation experience.
- Familiarity with Verilog RTL coding, FPGA coding, python, C/C++
- Candidates are expected to be passionate about analog and digital electronic circuit design.
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Qualification: B.E / B.Tech / M.E / M.Tech
Work Experience: 0 – 2 Years
How to Apply for Cadence Recruitment 2024?
Interested and Eligible candidates can apply for this drive online by using the link below.
Apply: Click Here